SizingTool

The single transistor simulator allows you to master analog circuit design by tuning each component to perfection.

SizingTool is not just a design tool; it also incorporates a comprehensive design methodology that enhances its effectiveness. The single transistor simulator allows you to master analog circuit design by tuning each component to perfection.

Visit our blog section for many examples of how SizingTool can help you design your CMOS analogue circuits.

Traditionally, simulators were always used to verify an integrated circuit by defining the device geometry and the sources applied to the circuit. The reverse approach was never employed. However, designers could use hand calculations to derive expressions for device geometry based on required specifications. Today, this is no longer feasible because hand calculations are invalidated by the complex models of modern transistor devices. Designers must now make assumptions about a device and rely on trial and error to determine if these assumptions are correct for the intended functional block. As design tasks have become more complex, the design methodology has become more erratic.

However, it remains true that individual specifications for each transistor in a network can be derived using proven methodologies. From these specifications, techniques such as the transconductance efficiency method or the current density method allow each transistor to be independently sized to the required geometry. A traditional simulator can be used for this task, but it is often too bulky because it is not designed to simulate a single transistor and provide an overview of its results. In contrast, SizingTool is specifically designed to efficiently simulate a few transistors while maintaining the same accuracy as complex simulators. SizingTool offers convenient input and instant response for all relevant output parameters, effectively replacing outdated hand-calculation models and tailored to modern IC processes. This results in better performing and more reliable designs in less time, as devices can be easily sized and optimized within building blocks, even across process corners and temperature variations. Overall system performance is still verified with larger software packages. SizingTool complements existing EDA tools and enhances the analog IC design process rather than competing with existing solutions.

SizingTool embodies a design methodology that comes with the tool. This methodology allows you to explore designs and make optimal decisions based on facts, not guesswork or trial and error. Even an optimizer won’t suffice. You need to understand what your circuit does to determine if it’s the right choice for your task. Once you grasp this, an optimizer becomes obsolete — you’ll know how it should work and only need to find the right device dimensions. That’s precisely what you achieve with SizingTool. As a single transistor tool, SizingTool and its methodology can be applied to any circuit you can imagine.

Another advantage of SizingTool is the ease with which you can explore new technologies. Simply provide a reordered standard model parameter file in text format, and SizingTool will simulate the DC, AC, and noise characteristics of the device. Process transfer also becomes straightforward, as you can perform a comprehensive comparison of the same transistor across different technologies.

SizingTool is currently only available for Windows 11 (version 23H2 and later)